synquacer: Enable CCN driver support

synquacer has CCN-512 interconnect. So enable proper CCN driver
initialization.

Signed-off-by: Sumit Garg <[email protected]>

diff --git a/plat/socionext/synquacer/include/platform_def.h b/plat/socionext/synquacer/include/platform_def.h
index 238fcbe02a5a89b6f3ed15e60b1849b290824134..12af4ecaaed86f9c8d7a887be3065fc27c327a1f 100644 (file)
--- a/plat/socionext/synquacer/include/platform_def.h
+++ b/plat/socionext/synquacer/include/platform_def.h
@@ -24,6 +24,21 @@
 #define BL31_SIZE                      0x00080000
 #define BL31_LIMIT                     (BL31_BASE + BL31_SIZE)
 
+#define PLAT_SQ_CCN_BASE               0x32000000
+#define PLAT_SQ_CLUSTER_TO_CCN_ID_MAP                                  \
+                                       0,      /* Cluster 0 */         \
+                                       18,     /* Cluster 1 */         \
+                                       11,     /* Cluster 2 */         \
+                                       29,     /* Cluster 3 */         \
+                                       35,     /* Cluster 4 */         \
+                                       17,     /* Cluster 5 */         \
+                                       12,     /* Cluster 6 */         \
+                                       30,     /* Cluster 7 */         \
+                                       14,     /* Cluster 8 */         \
+                                       32,     /* Cluster 9 */         \
+                                       15,     /* Cluster 10 */        \
+                                       33      /* Cluster 11 */
+
 /* UART related constants */
 #define PLAT_SQ_BOOT_UART_BASE         0x2A400000
 #define PLAT_SQ_BOOT_UART_CLK_IN_HZ    62500000

diff --git a/plat/socionext/synquacer/include/sq_common.h b/plat/socionext/synquacer/include/sq_common.h
index 531e52279757c089c84686f5cea8000472424953..84ef57fe4d366465ea17922500ee9ff68f99a880 100644 (file)
--- a/plat/socionext/synquacer/include/sq_common.h
+++ b/plat/socionext/synquacer/include/sq_common.h
@@ -9,6 +9,10 @@
 
 #include <sys/types.h>
 
+void plat_sq_interconnect_init(void);
+void plat_sq_interconnect_enter_coherency(void);
+void plat_sq_interconnect_exit_coherency(void);
+
 unsigned int sq_calc_core_pos(u_register_t mpidr);
 
 #endif /* __SQ_COMMON_H__ */

diff --git a/plat/socionext/synquacer/sq_bl31_setup.c b/plat/socionext/synquacer/sq_bl31_setup.c
index 481913bb5875c6be6c8c3b8667ab749f46a7e3fd..f3d58a9f9ce8fd46075abc48584d16073049fa1b 100644 (file)
--- a/plat/socionext/synquacer/sq_bl31_setup.c
+++ b/plat/socionext/synquacer/sq_bl31_setup.c
@@ -11,6 +11,7 @@
 #include <bl_common.h>
 #include <pl011.h>
 #include <debug.h>
+#include <sq_common.h>
 
 static console_pl011_t console;
 static entry_point_info_t bl32_image_ep_info;
@@ -95,6 +96,9 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
 
 void bl31_platform_setup(void)
 {
+       /* Initialize the CCN interconnect */
+       plat_sq_interconnect_init();
+       plat_sq_interconnect_enter_coherency();
 }
 
 void bl31_plat_runtime_setup(void)

diff --git a/plat/socionext/synquacer/sq_ccn.c b/plat/socionext/synquacer/sq_ccn.c
new file mode 100644 (file)
index 0000000..bb70d5d
--- /dev/null
+++ b/plat/socionext/synquacer/sq_ccn.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <arch_helpers.h>
+#include <ccn.h>
+#include <platform_def.h>
+
+static const unsigned char master_to_rn_id_map[] = {
+       PLAT_SQ_CLUSTER_TO_CCN_ID_MAP
+};
+
+static const ccn_desc_t sq_ccn_desc = {
+       .periphbase = PLAT_SQ_CCN_BASE,
+       .num_masters = ARRAY_SIZE(master_to_rn_id_map),
+       .master_to_rn_id_map = master_to_rn_id_map
+};
+
+/******************************************************************************
+ * Helper function to initialize SQ CCN driver.
+ *****************************************************************************/
+void plat_sq_interconnect_init(void)
+{
+       ccn_init(&sq_ccn_desc);
+}
+
+/******************************************************************************
+ * Helper function to place current master into coherency
+ *****************************************************************************/
+void plat_sq_interconnect_enter_coherency(void)
+{
+       ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
+}
+
+/******************************************************************************
+ * Helper function to remove current master from coherency
+ *****************************************************************************/
+void plat_sq_interconnect_exit_coherency(void)
+{
+       ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
+}